URL https://opencores.org/ocsvn/eco32/eco32/trunk

Subversion Repositories eco32

[/] [eco32/] [trunk/] [fpga/] [mc/] [src/] [tmr/] [tmr.v] - Rev 291

Rev	Log message	Author	Age	Path
290	Wishbone-compatible bus signals	hellwig	3389d 08h	/eco32/trunk/fpga/mc/src/tmr/tmr.v
288	new directory structure within fpga	hellwig	3390d 05h	/eco32/trunk/fpga/mc/src/tmr/tmr.v
69	hardware: timer counts clock cycles, counter is readable	hellwig	3920d 09h	/eco32/trunk/fpga/mc/src/tmr/tmr.v
68	hardware: timer now equal to port-15	hellwig	3920d 12h	/eco32/trunk/fpga/mc/src/tmr/tmr.v
67	fpga implementation update	hellwig	3920d 15h	/eco32/trunk/fpga/mc/src/tmr/tmr.v
27	fpga implementation unpacked	hellwig	3925d 13h	/eco32/trunk/fpga/mc/src/tmr/tmr.v