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[/] [ethmac/] [tags/] [rel_13/] [rtl/] [verilog/] [eth_spram_256x32.v] - Rev 357

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Rev Log message Author Age Path
338 root 5511d 05h /ethmac/tags/rel_13/rtl/verilog/eth_spram_256x32.v
335 New directory structure. root 5568d 10h /ethmac/tags/rel_13/rtl/verilog/eth_spram_256x32.v
265 This commit was manufactured by cvs2svn to create tag 'rel_13'. 7867d 07h /ethmac/tags/rel_13/rtl/verilog/eth_spram_256x32.v
227 Changed BIST scan signals. tadejm 7902d 03h /ethmac/tags/rel_13/rtl/verilog/eth_spram_256x32.v
210 BIST added. mohor 7910d 04h /ethmac/tags/rel_13/rtl/verilog/eth_spram_256x32.v
204 ETH_VIRTUAL_SILICON_RAM supported (for ASIC implementation). mohor 7927d 02h /ethmac/tags/rel_13/rtl/verilog/eth_spram_256x32.v
122 ethernet spram added. So far a generic ram and xilinx RAMB4 are used. mohor 7989d 04h /ethmac/tags/rel_13/rtl/verilog/eth_spram_256x32.v

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