OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [trunk/] [bench/] [verilog/] [tb_ethernet_with_cop.v] - Rev 364

Rev

Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
364 Renamed eth_top.v to ethmac.v to fit better into OpenCores structure olof 4856d 13h /ethmac/trunk/bench/verilog/tb_ethernet_with_cop.v
356 Rename eth_defines.v to ethmac_defines.v to fit better into OpenCores project structure olof 4861d 15h /ethmac/trunk/bench/verilog/tb_ethernet_with_cop.v
346 Updated project location olof 4878d 17h /ethmac/trunk/bench/verilog/tb_ethernet_with_cop.v
338 root 5682d 19h /ethmac/trunk/bench/verilog/tb_ethernet_with_cop.v
335 New directory structure. root 5740d 00h /ethmac/trunk/bench/verilog/tb_ethernet_with_cop.v
302 mbist signals updated according to newest convention markom 7710d 02h /ethmac/trunk/bench/verilog/tb_ethernet_with_cop.v
299 Artisan RAMs added. mohor 7767d 22h /ethmac/trunk/bench/verilog/tb_ethernet_with_cop.v
227 Changed BIST scan signals. tadejm 8073d 17h /ethmac/trunk/bench/verilog/tb_ethernet_with_cop.v
216 Bist signals added. mohor 8080d 21h /ethmac/trunk/bench/verilog/tb_ethernet_with_cop.v
189 Simple testbench that includes eth_cop, eth_host and eth_memory modules.
This testbench is used for testing the whole environment. Use tb_ethernet
testbench for testing just the ethernet MAC core (many tests).
mohor 8103d 18h /ethmac/trunk/bench/verilog/tb_ethernet_with_cop.v

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.