OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [trunk/] [rtl/] [verilog/] [eth_rxaddrcheck.v] - Rev 365

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
354 Whitespace cleanup olof 4865d 04h /ethmac/trunk/rtl/verilog/eth_rxaddrcheck.v
352 Removed delayed assignments from rtl code olof 4871d 12h /ethmac/trunk/rtl/verilog/eth_rxaddrcheck.v
341 Reset AdressMiss signal on new frames to prevent reporting the old status if new frame is short olof 4892d 04h /ethmac/trunk/rtl/verilog/eth_rxaddrcheck.v
338 root 5686d 07h /ethmac/trunk/rtl/verilog/eth_rxaddrcheck.v
335 New directory structure. root 5743d 12h /ethmac/trunk/rtl/verilog/eth_rxaddrcheck.v
261 Rx Flow control fixed. CF flag added to the RX buffer descriptor. RxAbort
synchronized.
mohor 8042d 20h /ethmac/trunk/rtl/verilog/eth_rxaddrcheck.v
250 AddressMiss status is connecting to the Rx BD. AddressMiss is identifying
that a frame was received because of the promiscous mode.
mohor 8045d 05h /ethmac/trunk/rtl/verilog/eth_rxaddrcheck.v
148 Bug when last byte of destination address was not checked fixed. mohor 8121d 03h /ethmac/trunk/rtl/verilog/eth_rxaddrcheck.v
93 When in promiscous mode some frames were not received correctly. Fixed. mohor 8289d 07h /ethmac/trunk/rtl/verilog/eth_rxaddrcheck.v
85 Log info was missing. mohor 8307d 01h /ethmac/trunk/rtl/verilog/eth_rxaddrcheck.v
83 MAC address recognition was not correct (bytes swaped). mohor 8307d 01h /ethmac/trunk/rtl/verilog/eth_rxaddrcheck.v
75 r_Bro is used for accepting/denying frames mohor 8311d 06h /ethmac/trunk/rtl/verilog/eth_rxaddrcheck.v
65 Testbench fixed, code simplified, unused signals removed. mohor 8321d 15h /ethmac/trunk/rtl/verilog/eth_rxaddrcheck.v
50 checks destination address for Unicast, Multicast and Broadcast ops billditt 8323d 03h /ethmac/trunk/rtl/verilog/eth_rxaddrcheck.v

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.