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Subversion Repositories ft816float

[/] [ft816float/] [trunk/] [rtl/] [verilog/] [fpDiv.v] - Rev 60

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Rev Log message Author Age Path
26 - factor out sizes
- add leading bit for FMA normalization to normalizer
robfinch 2022d 18h /ft816float/trunk/rtl/verilog/fpDiv.v
14 - added Goldschmidt divider robfinch 2269d 17h /ft816float/trunk/rtl/verilog/fpDiv.v
13 - fix sticky bit position robfinch 2512d 18h /ft816float/trunk/rtl/verilog/fpDiv.v
10 - fp updated
- test benches and vectors
robfinch 2516d 20h /ft816float/trunk/rtl/verilog/fpDiv.v
8 Updated better support for 80 bit / 128 bit ops robfinch 2939d 20h /ft816float/trunk/rtl/verilog/fpDiv.v
6 added more fp ops robfinch 3197d 12h /ft816float/trunk/rtl/verilog/fpDiv.v

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