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[/] [ft816float/] [trunk/] [rtl/] [verilog/] [fpMul.v] - Rev 29

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Rev Log message Author Age Path
26 - factor out sizes
- add leading bit for FMA normalization to normalizer
robfinch 2018d 04h /ft816float/trunk/rtl/verilog/fpMul.v
11 - fix multiply NaN robfinch 2511d 18h /ft816float/trunk/rtl/verilog/fpMul.v
10 - fp updated
- test benches and vectors
robfinch 2512d 06h /ft816float/trunk/rtl/verilog/fpMul.v
8 Updated better support for 80 bit / 128 bit ops robfinch 2935d 06h /ft816float/trunk/rtl/verilog/fpMul.v
6 added more fp ops robfinch 3192d 22h /ft816float/trunk/rtl/verilog/fpMul.v

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