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[/] [ft816float/] [trunk/] [rtl/] [verilog/] [fpRsqrte.sv] - Rev 79

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26 - factor out sizes
- add leading bit for FMA normalization to normalizer
robfinch 2022d 15h /ft816float/trunk/rtl/verilog/fpRsqrte.sv
16 - added reciprocal square root estimate robfinch 2029d 04h /ft816float/trunk/rtl/verilog/fpRsqrte.sv

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