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[/] [ft816float/] [trunk/] [rtl/] [verilog2/] [DFPRound128.sv] - Rev 77

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70 - fix carry out for BCD add / sub robfinch 989d 00h /ft816float/trunk/rtl/verilog2/DFPRound128.sv
64 - add multiply 128
- fix exponent bias
robfinch 993d 04h /ft816float/trunk/rtl/verilog2/DFPRound128.sv
57 - decimal floating-point IEEE format encode/decode robfinch 1396d 17h /ft816float/trunk/rtl/verilog2/DFPRound128.sv

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