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[/] [ft816float/] [trunk/] [rtl/] [verilog2/] [fpConfig.sv] - Rev 52

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35 - additional pipelining in divider
- radix4 primitive
robfinch 1683d 10h /ft816float/trunk/rtl/verilog2/fpConfig.sv
29 - refactor with FPWID and EXTRA_BITS
- Nan propagation
robfinch 1952d 12h /ft816float/trunk/rtl/verilog2/fpConfig.sv

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