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[/] [gecko3/] [trunk/] [GECKO3COM/] [gecko3com-ip/] [core/] [gpif_com_test.vhd] - Rev 26

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24 first version of the GECKO3COM_simple_test that successfully synthesized.
debugging starts now.

fixed a small bug in the gpif_com_test due to the adding of the gpif_com_eom signal and the eom bit
flip-flop in the gpif_com module.		 nussgipfel 5378d 13h /gecko3/trunk/GECKO3COM/gecko3com-ip/core/gpif_com_test.vhd
20 basic synchronous IN (fpga to host) transfer works.

detail changes:
-the scpi command "fpga:data" checks now, if the fpga is configured before it changes the context to the fpga. if the fpga is
not configured, it returns an "EXECUTE ERROR".
in the same way, the main_loop checks if the fpga looses his configuration. it disables the GPIF, switches the context back
to the fx2 if so. this is mainly to avoid undeterministic behaviour if you reconfigure the fpga via jtag.

-introduced the new signal "EOM" end of message from the "usb tmc protokoll interpreter" to the gpif_com module

-changed the GPIF waveform for the FIFO IN transfer to the new scheme.

-implemented the same waveform into the gpif_com_fsm.vhd. works well together.

-bugfixed the gpif_com_test.vhd. sends the new EOM signal, the response message generator works now as it should.

-added the missing AUTHORS README and COPYING (license) files to the core directory.		 nussgipfel 5397d 09h /gecko3/trunk/GECKO3COM/gecko3com-ip/core/gpif_com_test.vhd
19 found a pinning error in the series production documentation. fixed in the wiki and the core.

really stable host to fpga data transfer achieved. several time over 4Gbyte transfered. including switching to fpga to
host GPIF waveform to listen to possible fpga transfer tries. but fpga to host transfers still not finished.

the correct length of data is read from the gpif_fsm now. still untested data consitency when data flow throtling occours.
need bigger buffers to test this. will be done on a higher level.		 nussgipfel 5405d 11h /gecko3/trunk/GECKO3COM/gecko3com-ip/core/gpif_com_test.vhd
18 I achieved now stable OUT transfers (from the PC to the FPGA) with working throtling (when the FPGA consumes data slower than the host delivers).
The basics needed for this are implemented in the FPGA like handshaking with the FX2 and clock domain transistion from the Interface clock to the user defined system clock.

in the gpif_com_test.vhd is a message rom, containing a prepared answer message to generate an IN transfer. this is needed for the next step.		 nussgipfel 5408d 20h /gecko3/trunk/GECKO3COM/gecko3com-ip/core/gpif_com_test.vhd
14 reorganising and renaming the stuff in these project.

the core will get the name "GECKO3COM_" followed by the type "simple", "plb" or "opb"
to follow the naming in the GECKO3 wiki and to show the IP core interface.

duplicated fifo corecenerator files are merged together including a wrapper to easily supress synthesizer warnings
from unavailable, unused and unconnected pins.

the project is now organised in a way how the IP core and it's parts are beeing used. this means that the
low-level gpif access module is instantiated by the higher level modules and not the other way around.
this will make more sense when more parts of this IP core are finished (planning is finished, they have
to be implemented and tested now).		 nussgipfel 5436d 16h /gecko3/trunk/GECKO3COM/gecko3com-ip/core/gpif_com_test.vhd
12 this is the version 0.4 of the GECKO3com IP core.

This is the last version from Andreas Habegger, the maintainer for this core is now Christoph Zimmermann		 nussgipfel 5451d 19h /gecko3/trunk/GECKO3COM/gecko3com-ip/core/USB_TMC_IP_loopback.vhd
11 initial add of the version 0.3 of the GECKO3com IP core. originaly developped by Andreas Habegger.

this commit is just for backup and to make the project progress visible because version 0.4 is also ready and will be commited in the next step.		 nussgipfel 5451d 19h /gecko3/trunk/GECKO3COM/gecko3com-ip/core/USB_TMC_IP_loopback.vhd

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