OpenCores
URL https://opencores.org/ocsvn/ha1588/ha1588/trunk

Subversion Repositories ha1588

[/] [ha1588/] [tags/] [v1p0/] [sim/] [top/] [ha1588_tb.v] - Rev 43

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
28 Before changing TSU packet parser datapath width from 32b to 8b. edn_walter 4489d 13h /ha1588/tags/v1p0/sim/top/ha1588_tb.v
24 Added test cases for top-level testbench to cover both RTC and TSU. edn_walter 4492d 08h /ha1588/tags/v1p0/sim/top/ha1588_tb.v
21 Added structure for top-level simulation. Systemverilog DPI will be used to emulate the SW operation of PTP application. edn_walter 4494d 03h /ha1588/tags/v1p0/sim/top/ha1588_tb.v

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.