OpenCores
URL https://opencores.org/ocsvn/ha1588/ha1588/trunk

Subversion Repositories ha1588

[/] [ha1588/] [tags/] [v1p2/] [sim/] [tsu/] [tsu_queue_tb.v] - Rev 60

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
53 Corrected 2 bugs: SOPC addressing and Wrong Preamble+SFD format. edn_walter 4474d 23h /ha1588/tags/v1p2/sim/tsu/tsu_queue_tb.v
44 Updated TSU testbench. edn_walter 4483d 18h /ha1588/tags/v1p2/sim/tsu/tsu_queue_tb.v
43 Added software configurable PTP message id mask for TSU parser. edn_walter 4484d 16h /ha1588/tags/v1p2/sim/tsu/tsu_queue_tb.v
38 1. Redefined the memory map. See changes in reg.v and ptp_drv_bfm.c.
2. Added adj_done signal for CPU polling.
3. Making time_acc_modulo a constant = 256,000,000,000. No need to change it from software side.		 edn_walter 4486d 01h /ha1588/tags/v1p2/sim/tsu/tsu_queue_tb.v
37 Timestamp format in the queue = null_16bit + timeStamp1s_48bit + timeStamp1ns_32bit + msgId_4bit + ckSum_12bit + seqId_16bit edn_walter 4486d 04h /ha1588/tags/v1p2/sim/tsu/tsu_queue_tb.v
36 TSU testbench is now self-checking. Test result is reported at end of simulation. edn_walter 4486d 23h /ha1588/tags/v1p2/sim/tsu/tsu_queue_tb.v
35 Added support for stacked MPLS UDP/IPv4/IPv6 PTP packets. edn_walter 4487d 22h /ha1588/tags/v1p2/sim/tsu/tsu_queue_tb.v
34 Added LGPL file header to all copyrighted files. edn_walter 4488d 01h /ha1588/tags/v1p2/sim/tsu/tsu_queue_tb.v
32 Added PTP standard time format output to the top module. Can be connected to external modules. edn_walter 4488d 05h /ha1588/tags/v1p2/sim/tsu/tsu_queue_tb.v
30 Timestamp format in the queue = msgId_4bit + seqId_16bit + null_8bit + timeStamp1s_4bit + null_2bit + timeStamp1ns_30bit edn_walter 4488d 22h /ha1588/tags/v1p2/sim/tsu/tsu_queue_tb.v
15 Renamed module name for tsu and rtc.
Added folder for reg and top.
Added folder for sopc, preparing for Altera SOPC Builder customized component.		 edn_walter 4504d 18h /ha1588/tags/v1p2/sim/tsu/tsu_queue_tb.v
13 Added test case support for single VLAN and double VLAN L2/L4 PTP frames. edn_walter 4507d 18h /ha1588/tags/v1p2/sim/tsu/tsu_queue_tb.v
12 Added parser support for vlan tagged frames. edn_walter 4508d 17h /ha1588/tags/v1p2/sim/tsu/tsu_queue_tb.v
9 Timestamp format in the queue = seqId_16bit + msgId_4bit + timeStamp1s_2bit + timeStamp1ns_30bit edn_walter 4511d 18h /ha1588/tags/v1p2/sim/tsu/tsu_queue_tb.v
8 Timestamp format in the queue = seqId_16bit + msgId_2bit + timeStamp_30bit edn_walter 4512d 00h /ha1588/tags/v1p2/sim/tsu/tsu_queue_tb.v
7 Reduced the timestamp length from 80b to 30b to save memory, since the software could be fast enough to handle timestamp rollover events per 1s. Enlarged the fifo depth to 15, to accomodate 10 ptp sync messages per 1s. edn_walter 4512d 01h /ha1588/tags/v1p2/sim/tsu/tsu_queue_tb.v
5 Added dcfifo to store ptp time stamps. ash_riple 4514d 17h /ha1588/tags/v1p2/sim/tsu/tsu_queue_tb.v
4 Added source code and unit test for TSU. ash_riple 4515d 17h /ha1588/tags/v1p2/sim/tsu/tsu_queue_tb.v

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.