URL https://opencores.org/ocsvn/ha1588/ha1588/trunk

Subversion Repositories ha1588

[/] [ha1588/] [trunk/] [sim/] [top/] [ha1588_tb.v] - Rev 46

Rev	Log message	Author	Age	Path
38	1. Redefined the memory map. See changes in reg.v and ptp_drv_bfm.c. 2. Added adj_done signal for CPU polling. 3. Making time_acc_modulo a constant = 256,000,000,000. No need to change it from software side.	edn_walter	4604d 01h	/ha1588/trunk/sim/top/ha1588_tb.v
37	Timestamp format in the queue = null_16bit + timeStamp1s_48bit + timeStamp1ns_32bit + msgId_4bit + ckSum_12bit + seqId_16bit	edn_walter	4604d 04h	/ha1588/trunk/sim/top/ha1588_tb.v
34	Added LGPL file header to all copyrighted files.	edn_walter	4606d 01h	/ha1588/trunk/sim/top/ha1588_tb.v
32	Added PTP standard time format output to the top module. Can be connected to external modules.	edn_walter	4606d 05h	/ha1588/trunk/sim/top/ha1588_tb.v
24	Added test cases for top-level testbench to cover both RTC and TSU.	edn_walter	4610d 00h	/ha1588/trunk/sim/top/ha1588_tb.v
21	Added structure for top-level simulation. Systemverilog DPI will be used to emulate the SW operation of PTP application.	edn_walter	4611d 18h	/ha1588/trunk/sim/top/ha1588_tb.v