URL https://opencores.org/ocsvn/i2c/i2c/trunk

Subversion Repositories i2c

[/] [i2c/] [trunk/] [sim/] [i2c_verilog/] [run/] [bench.vcd] - Rev 68

Rev	Log message	Author	Age	Path
68	New directory structure.	root	5742d 18h	/i2c/trunk/sim/i2c_verilog/run/bench.vcd
22	Fixed a small timing bug in the bit controller.\nAdded verilog simulation environment.	rherveille	8202d 09h	/i2c/trunk/sim/i2c_verilog/run/bench.vcd