OpenCores
URL https://opencores.org/ocsvn/ion/ion/trunk

Subversion Repositories ion

[/] [ion/] [trunk/] [src/] [opcodes/] [makefile] - Rev 245

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
229 Code samples updated to use new VHDL config packages and new SoC (UART). ja_rd 4525d 18h /ion/trunk/src/opcodes/makefile
193 Major test bench reorganization:
1.- TB now uses same object code as synthesizable demo.
2.- TB now simulates full MPU system.
3.- Console logging moved to TB package.
4.- Code sample makefiles and modelsim script updated accordingly.
ja_rd 4852d 03h /ion/trunk/src/opcodes/makefile
189 fixed opcode test makefile: adapted to new common makefile ja_rd 4864d 11h /ion/trunk/src/opcodes/makefile
165 Added (very early draft, very incomplete) reserved opcode trap handler.
Updated opcode tester to test some emulated mips32 opcodes using the trap handler.
ja_rd 4901d 18h /ion/trunk/src/opcodes/makefile
148 Added optional cache support to 'opcodes' test.
Updated simulation length accordingly.
ja_rd 4908d 03h /ion/trunk/src/opcodes/makefile
110 Updated 'opcodes' code sample:
- Longer simulated time for compatibility to new cache
ja_rd 4968d 17h /ion/trunk/src/opcodes/makefile
90 Added 'Adventure' demo to be run from the DE-1 FLASH ja_rd 5012d 13h /ion/trunk/src/opcodes/makefile
66 Code samples:
Updated all code samples to use TB2 template and new memory map
ja_rd 5023d 03h /ion/trunk/src/opcodes/makefile
34 default data address moved to 0x80000000
makefiles and readme files updated accordingly
ja_rd 5029d 13h /ion/trunk/src/opcodes/makefile
24 changes in simulation test benches:
Simulation length now configurable from the python script
Console output logged to file, not to modelsim's window
ja_rd 5031d 16h /ion/trunk/src/opcodes/makefile
2 First commit (includes 'hello' demo) ja_rd 5034d 16h /ion/trunk/src/opcodes/makefile

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.