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[/] [ion/] [trunk/] [vhdl/] [mips_cache.vhdl] - Rev 199

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Rev Log message Author Age Path
162 Fixed stupid mistake in headers (date of project) ja_rd 4924d 11h /ion/trunk/vhdl/mips_cache.vhdl
161 Added GPL license info to the vhdl headers
This project is becoming respectable :)
ja_rd 4924d 11h /ion/trunk/vhdl/mips_cache.vhdl
151 BUG FIX: major bugs fixed in cache module
1.- sram address was wrong (leftover from previous version)
2.- writes to unmapped areas were blocking the cache
3.- Sequence SW,LW produced a RAW data hazard in some cases
ja_rd 4927d 15h /ion/trunk/vhdl/mips_cache.vhdl
145 MAJOR UPDATE: first version of D-Cache ja_rd 4930d 05h /ion/trunk/vhdl/mips_cache.vhdl
141 BUG FIX in cache: cpu stall logic was missing key case
2nd SW in a (cached) row was not being stalled
ja_rd 4931d 19h /ion/trunk/vhdl/mips_cache.vhdl
134 Added 'unmapped access' flag to CPU core, meant for debug mostly.
Eventually this flag will trigger an interrupt.
ja_rd 4932d 13h /ion/trunk/vhdl/mips_cache.vhdl
114 ADDED: 1st version of real cache ja_rd 4990d 17h /ion/trunk/vhdl/mips_cache.vhdl

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