OpenCores
URL https://opencores.org/ocsvn/ion/ion/trunk

Subversion Repositories ion

[/] [ion/] [trunk/] [vhdl/] [tb/] [mips_tb.vhdl] - Rev 201

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
200 CPU interrupt input changed to 8-bit vector
Other modules changed accordingly
Interrupts still missing; this is just preparing the interface
ja_rd 4851d 04h /ion/trunk/vhdl/tb/mips_tb.vhdl
193 Major test bench reorganization:
1.- TB now uses same object code as synthesizable demo.
2.- TB now simulates full MPU system.
3.- Console logging moved to TB package.
4.- Code sample makefiles and modelsim script updated accordingly.
ja_rd 4852d 20h /ion/trunk/vhdl/tb/mips_tb.vhdl

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.