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[/] [ion/] [trunk/] [vhdl/] [tb/] [mips_tb_pkg.vhdl] - Rev 104

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Rev Log message Author Age Path
96 CPU rd and wr data address buses unified ja_rd 5024d 21h /ion/trunk/vhdl/tb/mips_tb_pkg.vhdl
84 Added 'trigger address' for file logging to both the
vhdl TB and the python script
ja_rd 5035d 17h /ion/trunk/vhdl/tb/mips_tb_pkg.vhdl
60 Forgot to upload new TB package!!
Without this, simulations don't work...
ja_rd 5046d 08h /ion/trunk/vhdl/tb/mips_tb_pkg.vhdl

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