URL https://opencores.org/ocsvn/iso7816_3_master/iso7816_3_master/trunk

Subversion Repositories iso7816_3_master

[/] [iso7816_3_master/] [trunk/] [sources/] [HalfDuplexUartIf.v] - Rev 5

Rev	Log message	Author	Age	Path
4	Basic test bench completed for T=0: a card send ATR, reader send a command TODO: add cycles/ETU management (start at 372, then adjust in case of PPS...)	acapola	4910d 14h	/iso7816_3_master/trunk/sources/HalfDuplexUartIf.v
3	initial draft, not functional yet	acapola	4917d 15h	/iso7816_3_master/trunk/sources/HalfDuplexUartIf.v
2		acapola	4917d 16h	/iso7816_3_master/trunk/sources/HalfDuplexUartIf.v