URL https://opencores.org/ocsvn/light52/light52/trunk

Subversion Repositories light52

[/] [light52/] [trunk/] [vhdl/] [light52_cpu.vhdl] - Rev 20

Rev	Log message	Author	Age	Path
17	Refactor: interrupts made 100% compatible to original: IRQ priority logic implemented as in original MCS51. Register IP implemented. Interrupt mini-testbench code updated accordingly.	ja_rd	4319d 19h	/light52/trunk/vhdl/light52_cpu.vhdl
14	BUG FIX: <DJNZ dir, rel> didn't work when addressing an SFR. Signal direct_addressing fixed.	ja_rd	4325d 18h	/light52/trunk/vhdl/light52_cpu.vhdl
2	Full VHDL sources and Modelsim scripts. This is a migration of an existing project.	ja_rd	4392d 00h	/light52/trunk/vhdl/light52_cpu.vhdl