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[/] [light8080/] [trunk/] [sim/] [sim_tb0.do] - Rev 89

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78 Fixed a number of errors in the last refactor of the VHDL side of the project:
- Path errors in the simulation scripts.
- The reset pin in the C2SB mini-test-bench was not being driven.
- The main vhdl test bench file was missing entirely.

All of these errors due to not properly verifying the commit...
ja_rd 4611d 16h /light8080/trunk/sim/sim_tb0.do
69 New simulation scripts for Modelsim in new separate directory.
Includes old test benches for CPU VHDL core and new test benches for SoC VHDL core
ja_rd 4622d 22h /light8080/trunk/sim/sim_tb0.do

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