URL https://opencores.org/ocsvn/light8080/light8080/trunk

Subversion Repositories light8080

[/] [light8080/] [trunk/] [vhdl/] [test/] [light8080_tb0.vhdl] - Rev 68

Rev	Log message	Author	Age	Path
64	BUG FIX: Flags CY and AC were not clear by logic instructions Added new flag to microcode: clr_acy Used new flag to clear AC and CY flags unconditonally Modified microcode for XR, OR and AN* to use new flag Modified microcode assembler to support new flag Addex explaination of new flag to documentation Old fix that worked only for XR* instructions removed Test bench tb0 modified to test CY clearance minimally (AC untested!) Pre-generated vhel test bench tb0 altered accordingly	ja_rd	4650d 07h	/light8080/trunk/vhdl/test/light8080_tb0.vhdl
59	tabs to spaces	ja_rd	5047d 06h	/light8080/trunk/vhdl/test/light8080_tb0.vhdl
41	test bench 0 regenerated with new template no changes to the test code	ja_rd	5588d 13h	/light8080/trunk/vhdl/test/light8080_tb0.vhdl
31	New directory structure.	root	5719d 16h	/light8080/trunk/vhdl/test/light8080_tb0.vhdl
21	Totally changed -- vhdl code generated from a template	ja_rd	5739d 22h	/light8080/trunk/vhdl/test/light8080_tb0.vhdl
12	Minor changes in embedded code changed (success code now stands out better visually)	ja_rd	5826d 01h	/light8080/trunk/vhdl/test/light8080_tb0.vhdl
2	initial commit	ja_rd	6210d 06h	/light8080/trunk/vhdl/test/light8080_tb0.vhdl