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[/] [mcs-4/] [trunk/] [rtl/] [verilog/] [i4004/] [alu.v] - Rev 5

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5 Restructure the project directory hierarchy

This commit restructures the directory hierarchy to extract modules
that will be common to more than one MCS-4 chip, and move the modules
specific to the i4004 CPU to their own subdirectory.
rrpollack 1091d 05h /mcs-4/trunk/rtl/verilog/i4004/alu.v
4 Miscellaneous bugfixes to the Verilog implementation of the i4004 CPU rrpollack 1666d 01h /alu.v
2 Initial import of core 4004 CPU source rrpollack 4397d 17h /alu.v

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