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[/] [mdct/] [tags/] [MDCT_REL_B1_8/] [source/] [DCT1D.vhd] - Rev 24

Rev	Log message	Author	Age	Path
24	New directory structure.	root	5627d 20h	/mdct/tags/MDCT_REL_B1_8/source/DCT1D.vhd
23	This commit was manufactured by cvs2svn to create tag 'MDCT_REL_B1_8'.		5630d 01h	/mdct/tags/MDCT_REL_B1_8/source/DCT1D.vhd
18	Minor fixes. This release is FPGA proven.	mikel262	6654d 23h	/mdct/tags/MDCT_REL_B1_8/source/DCT1D.vhd
15	Redesigned. Fully pipelined, always ready for data design	mikel262	6676d 20h	/mdct/tags/MDCT_REL_B1_8/source/DCT1D.vhd
13	performance improved by 8%, latency reduced to 94 cycles	mikel262	6680d 19h	/mdct/tags/MDCT_REL_B1_8/source/DCT1D.vhd
10	+ moved memory allocation request to where it should be + reduced latency to 104 cycles	mikel262	6682d 21h	/mdct/tags/MDCT_REL_B1_8/source/DCT1D.vhd
7	documentation update. minor area optimization.	mikel262	6685d 18h	/mdct/tags/MDCT_REL_B1_8/source/DCT1D.vhd
4	area optimization - 100 slices less	mikel262	6686d 20h	/mdct/tags/MDCT_REL_B1_8/source/DCT1D.vhd
2	Initial import (Beta Release)	mikel262	6687d 08h	/mdct/tags/MDCT_REL_B1_8/source/DCT1D.vhd