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[/] [minimips_superscalar/] [trunk/] [sources/] [minimips.vhd] - Rev 21

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18 clock_gate.vhd: removed.
minimips.vhd: Clock2 input is wrongly connected to the clock signal (Do not ask me how that happened. I'm sorry.). The right thing is to be connected to the clock2 signal. Adjusted.
mcafruni 2060d 18h /minimips_superscalar/trunk/sources/minimips.vhd
2 mcafruni 2151d 17h /minimips_superscalar/trunk/sources/minimips.vhd

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