OpenCores
URL https://opencores.org/ocsvn/minsoc/minsoc/trunk

Subversion Repositories minsoc

[/] [minsoc/] [branches/] [rc-1.0/] [backend/] [spartan3a_dsp_kit/] [configure] - Rev 127

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
118 Configure scripts for Xilinx devices updated. All of them require to update or1200_defines.v. The non-standard part uses now the variable $BOARD to print that this board require non-standard update of files. rfajardo 4762d 05h /minsoc/branches/rc-1.0/backend/spartan3a_dsp_kit/configure
116 Configure scripts were trying to copy/patch projects files before creating them. Ordering is correct now. rfajardo 4762d 06h /minsoc/branches/rc-1.0/backend/spartan3a_dsp_kit/configure
109 Creating a branche for release candidate 1.0. rfajardo 4763d 01h /minsoc/branches/rc-1.0/backend/spartan3a_dsp_kit/configure
105 Updating configure scripts to copy Windows synthesis launch script setup.bat from either minsoc/syn/altera or minsoc/syn/xilinx to minsoc/syn. rfajardo 4763d 12h /minsoc/branches/rc-1.0/backend/spartan3a_dsp_kit/configure
97 As proposed by Javier Almansa automatically generated project files for simulation and synthesis are out of revision control. Instead, the backend configure scripts run the prj/Makefile now to generate the project files prior to configuration of SoC for a specific board. rfajardo 4807d 12h /minsoc/branches/rc-1.0/backend/spartan3a_dsp_kit/configure
86 Updating configure script messages. rfajardo 4813d 05h /minsoc/branches/rc-1.0/backend/spartan3a_dsp_kit/configure
85 Central project definition under prj. Synthesis and simulation take their project files from here. rfajardo 4813d 06h /minsoc/branches/rc-1.0/backend/spartan3a_dsp_kit/configure
69 backend update:
-minsoc_bench_defines.v
-gcc-opt.mk
Both files should now be under minsoc/backend to proper system functionality.
backend subdirectories have been given those files. Configure script updated accordingly.

They are searched there from system scripts and Makefiles.
-sim/bin/minsoc_verilog_files.txt has the files for Icarus Verilog, minsoc_bench_defines.v is now referenced from backend directory.
-sw/support/Makefile.inc now references to gcc-opt.mk inside backend.

backend/spartan3e_starter_kit_eth:
-It is the system configuration for Spartan 3E Starter Kit with Ethernet.
rfajardo 4937d 03h /minsoc/branches/rc-1.0/backend/spartan3a_dsp_kit/configure
64 firmware makefiles:
-every firmware makefile has now complete dependency. This also includes dependency on files under minsoc/backend (target specific files). That means, that if some target specific header changes, the support library dependent on it will be compiled. That will always happen, even if you compile the uart firmware. In other words, if you want to use uart firmware, you can always simply compile uart by issuing make all. If anything has changed, backend files, support library, drivers, it will update everything for you.
-TODO: dependency can be automatic created by using make together with gcc. Use it instead of declaring all dependencies manually.

Makefile system for synthesis:
-the dependency for every implementation step has been checked and is working fine.
-Makefile plus support files have been moved to minsoc/syn/src
-make usage is still under syn through files generated by backend bashscripts
Backend:
-files under backend are target specific files used for the system to work
-firmware compilation
-system simulation
-system implementation
-This directory is populated by visiting one of its subdirectories and typing ./configure

backend/spartan3a_dsp_kit:
-working on FPGA

backend/spartan3e_starter_kit:
-has to be tested

backend/ml509:
-missing files have to be copied and adapted, configure script has to be copied and adapted

backend/std:
-include files necessary for firmware compilation and system configuration
-it does not include files for synthesis and is not synthesizable
rfajardo 4939d 10h /minsoc/branches/rc-1.0/backend/spartan3a_dsp_kit/configure

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.