URL https://opencores.org/ocsvn/minsoc/minsoc/trunk

Subversion Repositories minsoc

[/] [minsoc/] [branches/] [rc-1.0/] [prj/] [scripts/] [xilinxxst.sh] - Rev 130

Rev	Log message	Author	Age	Path
109	Creating a branche for release candidate 1.0.	rfajardo	4805d 09h	/minsoc/branches/rc-1.0/prj/scripts/xilinxxst.sh
108	Scripts updates to correct paths when working under Windows. Now, ModelSim, Xilinx and Altera synthesis are working on Windows through batch files. Icarus Verilog and Altera synthesis are working as well. Job done!	rfajardo	4805d 12h	/minsoc/branches/rc-1.0/prj/scripts/xilinxxst.sh
88	Project structure, Xilinx Makefiles and simulation working.	rfajardo	4855d 12h	/minsoc/branches/rc-1.0/prj/scripts/xilinxxst.sh
85	Central project definition under prj. Synthesis and simulation take their project files from here.	rfajardo	4855d 13h	/minsoc/branches/rc-1.0/prj/scripts/xilinxxst.sh