URL https://opencores.org/ocsvn/minsoc/minsoc/trunk

Subversion Repositories minsoc

[/] [minsoc/] [branches/] [rc-1.0/] [prj/] [src/] [minsoc_bench.prj] - Rev 132

Rev	Log message	Author	Age	Path
131	Renaming testbench modules. Adding to ifdefs without which the testbench generation can fail.	rfajardo	4778d 16h	/minsoc/branches/rc-1.0/prj/src/minsoc_bench.prj
128	Outsourcing clocks and reset generations from minsoc_bench.v to minsoc_bench_clock.v.	rfajardo	4779d 06h	/minsoc/branches/rc-1.0/prj/src/minsoc_bench.prj
109	Creating a branche for release candidate 1.0.	rfajardo	4786d 10h	/minsoc/branches/rc-1.0/prj/src/minsoc_bench.prj
88	Project structure, Xilinx Makefiles and simulation working.	rfajardo	4836d 13h	/minsoc/branches/rc-1.0/prj/src/minsoc_bench.prj