URL https://opencores.org/ocsvn/minsoc/minsoc/trunk

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[/] [minsoc/] [branches/] [rc-1.0/] [sim/] [run/] [start_server] - Rev 174

Rev	Log message	Author	Age	Path
109	Creating a branche for release candidate 1.0.	rfajardo	4812d 05h	/minsoc/branches/rc-1.0/sim/run/start_server
34	start_server changed: '-t' option of adv_jtag_bridge for vpi connection on simulation removed. or1200_v3 will not pass on CPU self test. FAQ completed with asked questions since Februrary 2010. INSTALL informs bsdl files only have to be copied to home directory for Xilinx devices. synthesis_examples title includes Minimal OpenRISC System on Chip.	rfajardo	5188d 10h	/minsoc/branches/rc-1.0/sim/run/start_server
30	minsoc SoC documentation had 2 small typo corrections. Performance penalty due to addition of register addresses was a wrong assumption. On project description "is composed by" -> "consists of". Thanks to Wojciech A. Koszek. howto, at some places the howto did not tell the path from the files being talked about. I tried to always specify the path for every commented file. Scripts for running the simulation called bash instead of sh. For compatibility reasons sh is now used, this should affect noone. Scripts do not use bash specific commands and generally every UNIX like computer has sh. Thanks again to Wojciech A. Koszek, who adapted that to port it to FreeBSD.	rfajardo	5308d 15h	/minsoc/branches/rc-1.0/sim/run/start_server
2	First commit of project. Beta status: -testbench: working -firmware: working -RTL: Working for: Xilinx Spartan-3A DSP Development Kit	rfajardo	5580d 13h	/minsoc/branches/rc-1.0/sim/run/start_server