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[/] [minsoc/] [branches/] [verilator/] [doc/] [README.txt] - Rev 169

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139 Creating a verilator branche. rfajardo 4781d 20h /minsoc/branches/verilator/doc/README.txt
109 Creating a branche for release candidate 1.0. rfajardo 4808d 10h /minsoc/branches/verilator/doc/README.txt
101 Documentation, wiki's address updated. rfajardo 4843d 22h /minsoc/branches/verilator/doc/README.txt
49 Language correction for README.txt. rfajardo 5026d 15h /minsoc/branches/verilator/doc/README.txt
48 Clear some old docs that are already ported to MinSOC's Wiki ConX. 5026d 17h /minsoc/branches/verilator/doc/README.txt
40 Commiting a contributions directory, which has raw contributions of users. These contributions still have to be adapted to the system in order to work well. However, some users are certainly able to work with these versions.

FAQ: -added new idea to circumvent onboard DLC9 cable problem for adv_jtag_bridge
INSTALL: -gives a hint on how to install the system for Windows
HOWTO: -explains what a ucf file is and how to create it

backend: now we have the first contribution of a ucf file for the ML509 board (thanks to Matthew Hick)

Documentation: THESIS.txt explains to users, willing to tweak/understand the inner behavior of the OR1200 implementation of OpenRISC, what to read in order to get this information.		 rfajardo 5039d 14h /minsoc/branches/verilator/doc/README.txt
37 README.txt added, describing the installation and set-up processes. Also describing to use the FAQ or forum when you have problems and finally to read minsoc.pdf (the documentation) to understand the system after everything works, to know what to do next.

Clean-up of sw/utils, removing unused sources and files.

Update of sw/drivers/eth.c, direct casting to avoid compile warnings.

FAQ extended and with more links to the threads giving the solutions.

Synthesis examples inform that the firmware tweak for Spartan3E Starter Kit using Ethernet only works for system version up to 35.

minsoc.pdf and webpage now uses FPGA generic and specific codes instead of FPGA independent and dependent codes, because it suits it better.		 rfajardo 5169d 17h /minsoc/branches/verilator/doc/README.txt

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