OpenCores
URL https://opencores.org/ocsvn/minsoc/minsoc/trunk

Subversion Repositories minsoc

[/] [minsoc/] [trunk/] [backend/] [altera_3c25_board/] [minsoc_defines.v] - Rev 107

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
99 backend/altera_3c25_board/minsoc_defines.v: if GENERIC_FPGA selected, undefine ALTERA_FPGA and FPGA_FAMILY to avoid vendor specific code to flow into the simulation. If you don't do it, generate_bench fails. rfajardo 4849d 18h /minsoc/trunk/backend/altera_3c25_board/minsoc_defines.v
95 Makefile for Altera FPGAs fixed javieralso 4851d 08h /minsoc/trunk/backend/altera_3c25_board/minsoc_defines.v
93 Support for Altera synthesis. It needs some tune, but it works fine javieralso 4853d 20h /minsoc/trunk/backend/altera_3c25_board/minsoc_defines.v

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.