URL https://opencores.org/ocsvn/minsoc/minsoc/trunk

Subversion Repositories minsoc

[/] [minsoc/] [trunk/] [backend/] [ug257/] [minsoc_defines.v] - Rev 167

Rev	Log message	Author	Age	Path
158	Adding de2_115_board port, thanks to Richard Hasha. Support to JSP (JTAG Serial Port) working well. Also provided by Richard Hasha. Different interconnect configurations per board are not straightforward on MinSoC. New added modules or definitions for addresses have to be carried over to other boards. Furthermore, extra modules can be shared among all projects. Thus, it is better to have this centralized: -Removing interconnect configuration from minsoc_defines.v. There is an interconnect_defines.v file on rtl/verilog. The software counterpart is interconnect.h on sw/drivers. Including a jsp firmware. It is basically the uart firmware but using JSP instead. Added to all board configure scripts to be compiled on configuration. prj/srcs extended to include jsp and interconnec_defines.v. spartan3e_starter_kit_eth lost UART (does not fit) and uses JSP instead now.	rfajardo	4734d 19h	/minsoc/trunk/backend/ug257/minsoc_defines.v
149	Merging differences of release candidate 1.0 revision 140:148 with trunk.	rfajardo	4773d 04h	/minsoc/trunk/backend/ug257/minsoc_defines.v
146	Importing 'Xilinx Microblaze Dev. Kit 1600E Edition' board configuration directory.	ConX.	4778d 08h	/minsoc/branches/rc-1.0/backend/ug257/minsoc_defines.v