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[/] [minsoc/] [trunk/] [sw/] [support/] [int.c] - Rev 36

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11 External interrupt processing was being run multiple times because:
-external level interrupts have to be cleared
-internal interrupt status register has to be cleared
Since internal interrupt status register was being cleared before external level interrupts clearance, these internal interrupt status was being overwritten inbetween.

Solution:
-move status register reset to end of interrupt handler instead of beginning.

Testbench signal uart_srx initialized now.
rfajardo 5515d 05h /minsoc/trunk/sw/support/int.c
2 First commit of project. Beta status:
-testbench: working
-firmware: working
-RTL: Working for: Xilinx Spartan-3A DSP Development Kit
rfajardo 5550d 08h /minsoc/trunk/sw/support/int.c

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