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[/] [minsoc/] [trunk/] [sw/] [uart/] [uart.c] - Rev 60

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Rev	Log message	Author	Age	Path
53	Indentation, deleting redundant files and adding externals	ConX.	4951d 12h	/minsoc/trunk/sw/uart/uart.c
38	Small update to HOWTO: advices now to also include the ucf (pinout) file, for forgetful people :-). FAQ: Added another option (hint) as a solution for people with on-board Xilinx USB cables, which do not reset. uart.c: now uses the IRQ line definition instead of the line number directly.	rfajardo	5093d 00h	/minsoc/trunk/sw/uart/uart.c
36	utils: -adding a 32 to 8 bit Wishbone bridge to connect 8 bit modules to the MinSoC interconnect. -adding a Linux driver for parallel cables for the adv_jtag_bridge. It circumvents the necessity of privilege to run adv_jtag_bridge with cables xpc3 and xess. sw/support: support library has been made completely standalone. That means, it is now independent from uClib and/or newlib. Thanks to Wojciech A. Koszek for his contribution on this. sw/drivers: a driver library has been included, which supply drivers for the OpenRISC timer; and for UART, Ethernet, I2C, and CAN modules from OpenCores. sw/uart and sw/eth: they don't provide code to control the UART and Ethernet controllers anymore. They use the drivers library instead. Documentation: -FAQ extended: -table of contents -explanation of how to use the 32 to 8 bit Wishbone bridge -how to make adv_jtag_bridge work without privilege requirement for xess or xpc3 -explanation of locking problem of xpc_usb cable -explanation of what to do if the cable is built on-board -INSTALL: -patching of gdb only required if version is 6.8, explanation on FAQ now. -HOWTO: -instruct to compile drivers library -remove line numbers information on what to edit, better leave it to be found only by the informed context. -adv_jtag_bridge execution now without 'sudo'. Note included that 'sudo' is required for Linux and xess or xpc3. Reference to FAQ to avoid this requirement.	rfajardo	5124d 07h	/minsoc/trunk/sw/uart/uart.c
2	First commit of project. Beta status: -testbench: working -firmware: working -RTL: Working for: Xilinx Spartan-3A DSP Development Kit	rfajardo	5530d 12h	/minsoc/trunk/sw/uart/uart.c

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