OpenCores

URL https://opencores.org/ocsvn/minsoc/minsoc/trunk

Subversion Repositories minsoc

[/] [minsoc/] [trunk/] [utils/] [setup/] [minsoc-setup.sh] - Rev 146

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Rev	Log message	Author	Age	Path
141	Merging with rc-1.0 revision 140. I doubt rc-1.0 will still change much in the last days.	rfajardo	4745d 21h	/minsoc/trunk/utils/setup/minsoc-setup.sh
122	Renaming minsoc-configure.sh to minsoc-setup.sh.	rfajardo	4771d 11h	/minsoc/branches/rc-1.0/utils/setup/minsoc-setup.sh
114	Installation and Configuration scripts can be run out of any directory. They assume they are going to process the files and directories found in the directory they are run from.	rfajardo	4771d 18h	/minsoc/branches/rc-1.0/utils/setup/minsoc-configure.sh
113	minsoc-install.sh & minsoc-configure.sh: -aware of location of configure.sh script configure.sh: -does not block on patch error spartan3e_starter_kit & spartan3e_starter_kit_eth: -or1200_defines.v updated prj: -src/blackboxes/or1200_top.v adjusted to or1200_rel1 -Makefile had a typo regarding altera vhdl files	rfajardo	4771d 18h	/minsoc/branches/rc-1.0/utils/setup/minsoc-configure.sh
112	Updating installation & configuration scripts.	rfajardo	4772d 09h	/minsoc/branches/rc-1.0/utils/setup/minsoc-configure.sh
110	Fixing several minor issues with the system: -minsoc-install splitted into installation and configuration -minsoc-configure.sh can be used to configure a fresh checked out system -configure script used by both minsoc-configure.sh and minsoc-install.sh to configure -rtl/verilog: svn externals fixed -or1200 rolled back to release-1.0 -prj/scripts: -Makefile has been used by simulation to differentiate project definition of vhdl and verilog files -Altera was differentiating it in script -now there are two scripts, one for vhdl and another for verilog. The differentiation occurs in Makefile as for simulation. -altera_3c25_board/configure scripts had to be updated, vprj and vhdprj file extensions used to differentiate Verilog and VHDL project files. -prj/src: or1200_top.prj downdated to definition of or1200_v1	rfajardo	4772d 10h	/minsoc/branches/rc-1.0/utils/setup/minsoc-configure.sh

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.