OpenCores
URL https://opencores.org/ocsvn/mlite/mlite/trunk

Subversion Repositories mlite

[/] [mlite/] [tags/] [V2_1/] [vhdl/] [control.vhd] - Rev 350

Rev

Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
350 root 5638d 02h /mlite/tags/V2_1/vhdl/control.vhd
127 This commit was manufactured by cvs2svn to create tag 'V2_1'. 7374d 14h /mlite/tags/V2_1/vhdl/control.vhd
113 Matthias Grunewald's bug fixes:
Branch and compare instructions didn't interpret immediate as signed.
rhoads 7555d 15h /mlite/tags/V2_1/vhdl/control.vhd
84 Fixed comment rhoads 8080d 12h /mlite/tags/V2_1/vhdl/control.vhd
71 removed pause in rhoads 8088d 13h /mlite/tags/V2_1/vhdl/control.vhd
61 mem_none -> mem_fetch rhoads 8096d 18h /mlite/tags/V2_1/vhdl/control.vhd
46 Comments cleanup rhoads 8114d 15h /mlite/tags/V2_1/vhdl/control.vhd
44 Fixed signed 64-bit multiply rhoads 8192d 04h /mlite/tags/V2_1/vhdl/control.vhd
43 Renamed M-lite to Plasma rhoads 8194d 15h /mlite/tags/V2_1/vhdl/control.vhd
39 Changed name to M-lite to avoid trademark issues. rhoads 8226d 20h /mlite/tags/V2_1/vhdl/control.vhd
17 Fixed "blez $0,target". Made LWL=LW and SWL=SW. Changed tabs to spaces. rhoads 8253d 14h /mlite/tags/V2_1/vhdl/control.vhd
10 Add pause_in to process dependency, fixes "lw $4,0($4)" rhoads 8257d 13h /mlite/tags/V2_1/vhdl/control.vhd
7 Made writes 4 cycles, improved mem_ctrl.vhd rhoads 8268d 21h /mlite/tags/V2_1/vhdl/control.vhd
6 JAL now correctly sets r31 to instruction AFTER branch delay slot. Fixed interrupts. rhoads 8272d 19h /mlite/tags/V2_1/vhdl/control.vhd
2 MIPS-lite CPU core rhoads 8491d 20h /mlite/tags/V2_1/vhdl/control.vhd

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.