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[/] [mlite/] [tags/] [V3_0/] [vhdl/] [pipeline.vhd] - Rev 350

Rev	Log message	Author	Age	Path
350		root	5620d 23h	/mlite/tags/V3_0/vhdl/pipeline.vhd
140	This commit was manufactured by cvs2svn to create tag 'V3_0'.		6721d 12h	/mlite/tags/V3_0/vhdl/pipeline.vhd
139	Major changes -- updated to Plasma Version 3	rhoads	6721d 12h	/mlite/tags/V3_0/vhdl/pipeline.vhd
128	Reset all registers, constants now upper case.	rhoads	7338d 21h	/mlite/tags/V3_0/vhdl/pipeline.vhd
122	Added comment to explain why c_bus isn't delayed but reg_dest is delayed.	rhoads	7488d 12h	/mlite/tags/V3_0/vhdl/pipeline.vhd
107	merged rising_edge(clk) statements	rhoads	7812d 08h	/mlite/tags/V3_0/vhdl/pipeline.vhd
101	Correctly freeze the pipeline when mem_pause = '1'	rhoads	7816d 10h	/mlite/tags/V3_0/vhdl/pipeline.vhd
96	Simplify take_branch	rhoads	8061d 15h	/mlite/tags/V3_0/vhdl/pipeline.vhd
82	Added to process list	rhoads	8063d 09h	/mlite/tags/V3_0/vhdl/pipeline.vhd
69	Added a third pipeline stage	rhoads	8071d 10h	/mlite/tags/V3_0/vhdl/pipeline.vhd