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[/] [mlite/] [tags/] [V3_0/] [vhdl/] [ram.vhd] - Rev 350

Rev	Log message	Author	Age	Path
350		root	5620d 23h	/mlite/tags/V3_0/vhdl/ram.vhd
140	This commit was manufactured by cvs2svn to create tag 'V3_0'.		6721d 12h	/mlite/tags/V3_0/vhdl/ram.vhd
139	Major changes -- updated to Plasma Version 3	rhoads	6721d 12h	/mlite/tags/V3_0/vhdl/ram.vhd
132	Changed "GENERIC" string to "DEFAULT" to be Xilinx friendly.	rhoads	7201d 10h	/mlite/tags/V3_0/vhdl/ram.vhd
128	Reset all registers, constants now upper case.	rhoads	7338d 22h	/mlite/tags/V3_0/vhdl/ram.vhd
98	Fix size of GENERIC ram.	rhoads	7963d 08h	/mlite/tags/V3_0/vhdl/ram.vhd
85	Use ADDRESS_WIDTH when decoding mem_sel	rhoads	8063d 09h	/mlite/tags/V3_0/vhdl/ram.vhd
55	Altera	rhoads	8079d 15h	/mlite/tags/V3_0/vhdl/ram.vhd
48	Altera	rhoads	8090d 11h	/mlite/tags/V3_0/vhdl/ram.vhd
43	Renamed M-lite to Plasma	rhoads	8177d 11h	/mlite/tags/V3_0/vhdl/ram.vhd
39	Changed name to M-lite to avoid trademark issues.	rhoads	8209d 17h	/mlite/tags/V3_0/vhdl/ram.vhd
11	Added comment for DEBUG mode	rhoads	8240d 10h	/mlite/tags/V3_0/vhdl/ram.vhd
7	Made writes 4 cycles, improved mem_ctrl.vhd	rhoads	8251d 18h	/mlite/tags/V3_0/vhdl/ram.vhd
2	MIPS-lite CPU core	rhoads	8474d 16h	/mlite/tags/V3_0/vhdl/ram.vhd