URL https://opencores.org/ocsvn/mlite/mlite/trunk

Subversion Repositories mlite

[/] [mlite/] [trunk/] [vhdl/] [ram.vhd] - Rev 350

Rev	Log message	Author	Age	Path
350		root	5576d 21h	/mlite/trunk/vhdl/ram.vhd
344	Fixed compiler warning	rhoads	5648d 13h	/mlite/trunk/vhdl/ram.vhd
335	Use enable signal for byte_we	rhoads	5695d 12h	/mlite/trunk/vhdl/ram.vhd
260	Removed Xilinx use statements	rhoads	6027d 20h	/mlite/trunk/vhdl/ram.vhd
139	Major changes -- updated to Plasma Version 3	rhoads	6677d 10h	/mlite/trunk/vhdl/ram.vhd
132	Changed "GENERIC" string to "DEFAULT" to be Xilinx friendly.	rhoads	7157d 08h	/mlite/trunk/vhdl/ram.vhd
128	Reset all registers, constants now upper case.	rhoads	7294d 20h	/mlite/trunk/vhdl/ram.vhd
98	Fix size of GENERIC ram.	rhoads	7919d 06h	/mlite/trunk/vhdl/ram.vhd
85	Use ADDRESS_WIDTH when decoding mem_sel	rhoads	8019d 07h	/mlite/trunk/vhdl/ram.vhd
55	Altera	rhoads	8035d 13h	/mlite/trunk/vhdl/ram.vhd
48	Altera	rhoads	8046d 09h	/mlite/trunk/vhdl/ram.vhd
43	Renamed M-lite to Plasma	rhoads	8133d 10h	/mlite/trunk/vhdl/ram.vhd
39	Changed name to M-lite to avoid trademark issues.	rhoads	8165d 15h	/mlite/trunk/vhdl/ram.vhd
11	Added comment for DEBUG mode	rhoads	8196d 08h	/mlite/trunk/vhdl/ram.vhd
7	Made writes 4 cycles, improved mem_ctrl.vhd	rhoads	8207d 16h	/mlite/trunk/vhdl/ram.vhd
2	MIPS-lite CPU core	rhoads	8430d 15h	/mlite/trunk/vhdl/ram.vhd