URL https://opencores.org/ocsvn/mlite/mlite/trunk

Subversion Repositories mlite

[/] [mlite/] [trunk/] [vhdl/] [ram.vhd] - Rev 351

Rev	Log message	Author	Age	Path
350		root	5719d 03h	/mlite/trunk/vhdl/ram.vhd
344	Fixed compiler warning	rhoads	5790d 19h	/mlite/trunk/vhdl/ram.vhd
335	Use enable signal for byte_we	rhoads	5837d 18h	/mlite/trunk/vhdl/ram.vhd
260	Removed Xilinx use statements	rhoads	6170d 02h	/mlite/trunk/vhdl/ram.vhd
139	Major changes -- updated to Plasma Version 3	rhoads	6819d 16h	/mlite/trunk/vhdl/ram.vhd
132	Changed "GENERIC" string to "DEFAULT" to be Xilinx friendly.	rhoads	7299d 14h	/mlite/trunk/vhdl/ram.vhd
128	Reset all registers, constants now upper case.	rhoads	7437d 02h	/mlite/trunk/vhdl/ram.vhd
98	Fix size of GENERIC ram.	rhoads	8061d 12h	/mlite/trunk/vhdl/ram.vhd
85	Use ADDRESS_WIDTH when decoding mem_sel	rhoads	8161d 13h	/mlite/trunk/vhdl/ram.vhd
55	Altera	rhoads	8177d 19h	/mlite/trunk/vhdl/ram.vhd
48	Altera	rhoads	8188d 15h	/mlite/trunk/vhdl/ram.vhd
43	Renamed M-lite to Plasma	rhoads	8275d 16h	/mlite/trunk/vhdl/ram.vhd
39	Changed name to M-lite to avoid trademark issues.	rhoads	8307d 21h	/mlite/trunk/vhdl/ram.vhd
11	Added comment for DEBUG mode	rhoads	8338d 14h	/mlite/trunk/vhdl/ram.vhd
7	Made writes 4 cycles, improved mem_ctrl.vhd	rhoads	8349d 22h	/mlite/trunk/vhdl/ram.vhd
2	MIPS-lite CPU core	rhoads	8572d 20h	/mlite/trunk/vhdl/ram.vhd