URL https://opencores.org/ocsvn/mlite/mlite/trunk

Subversion Repositories mlite

[/] [mlite/] [trunk/] [vhdl/] [tbench.vhd] - Rev 350

Rev	Log message	Author	Age	Path
350		root	5581d 04h	/mlite/trunk/vhdl/tbench.vhd
346	Support optional 4KB cache	rhoads	5648d 23h	/mlite/trunk/vhdl/tbench.vhd
265	Changed write_byte_enable to byte_we	rhoads	6032d 02h	/mlite/trunk/vhdl/tbench.vhd
139	Major changes -- updated to Plasma Version 3	rhoads	6681d 16h	/mlite/trunk/vhdl/tbench.vhd
132	Changed "GENERIC" string to "DEFAULT" to be Xilinx friendly.	rhoads	7161d 15h	/mlite/trunk/vhdl/tbench.vhd
128	Reset all registers, constants now upper case.	rhoads	7299d 02h	/mlite/trunk/vhdl/tbench.vhd
106	better test mem_pause	rhoads	7775d 15h	/mlite/trunk/vhdl/tbench.vhd
102	permit testing mem_pause	rhoads	7776d 14h	/mlite/trunk/vhdl/tbench.vhd
55	Altera	rhoads	8039d 20h	/mlite/trunk/vhdl/tbench.vhd
51	GENERIC	rhoads	8050d 15h	/mlite/trunk/vhdl/tbench.vhd
48	Altera	rhoads	8050d 15h	/mlite/trunk/vhdl/tbench.vhd
47	Altera	rhoads	8057d 16h	/mlite/trunk/vhdl/tbench.vhd
43	Renamed M-lite to Plasma	rhoads	8137d 16h	/mlite/trunk/vhdl/tbench.vhd
39	Changed name to M-lite to avoid trademark issues.	rhoads	8169d 21h	/mlite/trunk/vhdl/tbench.vhd
8	Preparing to use dual-port memory for registers.	rhoads	8206d 15h	/mlite/trunk/vhdl/tbench.vhd
7	Made writes 4 cycles, improved mem_ctrl.vhd	rhoads	8211d 22h	/mlite/trunk/vhdl/tbench.vhd
6	JAL now correctly sets r31 to instruction AFTER branch delay slot. Fixed interrupts.	rhoads	8215d 20h	/mlite/trunk/vhdl/tbench.vhd
2	MIPS-lite CPU core	rhoads	8434d 21h	/mlite/trunk/vhdl/tbench.vhd