URL https://opencores.org/ocsvn/mod_sim_exp/mod_sim_exp/trunk

Subversion Repositories mod_sim_exp

[/] [mod_sim_exp/] [trunk/] [syn/] [xilinx/] [src/] [operand_dp.xco] - Rev 88

Rev	Log message	Author	Age	Path
71	added synthesis report for altera and xilinx for the new ram. added coregen sources for xilinx for primitive RAM	JonasDC	4261d 02h	/mod_sim_exp/trunk/syn/xilinx/src/operand_dp.xco