URL https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk

Subversion Repositories open8_urisc

[/] [open8_urisc/] [trunk/] [Sample Projects.zip] - Rev 255

Rev	Log message	Author	Age	Path
240	Simplified the vector tx/rx system to a single line. An idle detector replaces the attn_req signal.	jshamlet	1695d 23h	/open8_urisc/trunk/Sample Projects.zip
239	More cleanup and notation of board to board I/O	jshamlet	1696d 04h	/open8_urisc/trunk/Sample Projects.zip
238	Removed extraneous reference to Ints.VEC_Flag from task.s, since it is supposed to be in the init function in test_fn.s.	jshamlet	1696d 23h	/open8_urisc/trunk/Sample Projects.zip
237	Found some errors in the comments and cleaned up unnecessary library references.	jshamlet	1697d 02h	/open8_urisc/trunk/Sample Projects.zip
236	More software cleanup for the Open8_II project	jshamlet	1697d 03h	/open8_urisc/trunk/Sample Projects.zip
235	Ok, this time with feeling.	jshamlet	1701d 21h	/open8_urisc/trunk/Sample Projects.zip
234	Forgot to add documentation	jshamlet	1701d 23h	/open8_urisc/trunk/Sample Projects.zip
233	Updated the Sample Projects.zip	jshamlet	1701d 23h	/open8_urisc/trunk/Sample Projects.zip
232	More code cleanup on sample projects. SDLC2LCD should now match the Open8_II project model.	jshamlet	1711d 03h	/open8_urisc/trunk/Sample Projects.zip
231	Updated sample projects and added elapsed time capture (chronometer) module	jshamlet	1711d 03h	/open8_urisc/trunk/Sample Projects.zip
230	Added two sample projects that show how to connect and program an Open8 system	jshamlet	1714d 14h	/open8_urisc/trunk/Sample Projects.zip