OpenCores
URL https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk

Subversion Repositories open8_urisc

[/] [open8_urisc/] [trunk/] [VHDL/] [Open8_pkg.vhd] - Rev 157

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
153 Fixed bug in interrupt logic that caused stack pointer to increment if interrupt occurred as specific instructions were being decoded,
Fixed bug in interrupt logic where instruction caching would remain enabled during an interrupt, causing improper execution depending on what instruction was in the decode stage as the interrupt is trigered.
jshamlet 4881d 20h /open8_urisc/trunk/VHDL/Open8_pkg.vhd
151 Fixed STO instruction and interrupt logic to avoid address bus corruption issues. jshamlet 4891d 23h /open8_urisc/trunk/VHDL/Open8_pkg.vhd
10 corrected implementation for BTT to match V8/ARClite definition, changed sense of reset, corrected comments to match source values khays 5033d 08h /open8_urisc/trunk/VHDL/Open8_pkg.vhd
8 Need to learn SVN... jshamlet 5361d 19h /open8_urisc/trunk/VHDL/Open8_pkg.vhd
7 Initial Upload jshamlet 5361d 19h /open8_urisc/trunk/open8_urisc/VHDL/Open8_pkg.vhd

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.