URL https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk

Subversion Repositories open8_urisc

[/] [open8_urisc/] [trunk/] [VHDL/] [Open8_pkg.vhd] - Rev 178

Rev	Log message	Author	Age	Path
172	General code cleanup	jshamlet	3253d 19h	/open8_urisc/trunk/VHDL/Open8_pkg.vhd
169	Corrected issue with CMP and SBC generating an inverted carry flag and added new constants to the package file to simplify interfacing new modules.	jshamlet	3308d 20h	/open8_urisc/trunk/VHDL/Open8_pkg.vhd
153	Fixed bug in interrupt logic that caused stack pointer to increment if interrupt occurred as specific instructions were being decoded, Fixed bug in interrupt logic where instruction caching would remain enabled during an interrupt, causing improper execution depending on what instruction was in the decode stage as the interrupt is trigered.	jshamlet	4911d 11h	/open8_urisc/trunk/VHDL/Open8_pkg.vhd
151	Fixed STO instruction and interrupt logic to avoid address bus corruption issues.	jshamlet	4921d 14h	/open8_urisc/trunk/VHDL/Open8_pkg.vhd
10	corrected implementation for BTT to match V8/ARClite definition, changed sense of reset, corrected comments to match source values	khays	5062d 23h	/open8_urisc/trunk/VHDL/Open8_pkg.vhd
8	Need to learn SVN...	jshamlet	5391d 10h	/open8_urisc/trunk/VHDL/Open8_pkg.vhd
7	Initial Upload	jshamlet	5391d 10h	/open8_urisc/trunk/open8_urisc/VHDL/Open8_pkg.vhd