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[/] [open8_urisc/] [trunk/] [VHDL/] [Open8_pkg.vhd] - Rev 186

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186 Merged the interrupt override logic into the case structure, simplifying how interrupts are processed. jshamlet 1748d 13h /open8_urisc/trunk/VHDL/Open8_pkg.vhd
185 1) Fixed an apparently long-standing bug where the interrupt bit wasn't being cleared after an RTI
2) Modified the program counter logic to be simpler. It now always increments, and states control the increment using the offset field. A new set of constants was added to replace the old states.
3) Modified the ALU to always use Operand1 instead of ALU_Ctrl.Data (and removed the field in the record). A new ALU command, ALU_GMSK, was added, as it was the only instruction to set the .Data field to something other than Operand1 (Int_Mask)
4) Modified the package file so that flag names match what the assembler calls them. FL_Z is now PSR_Z, FL_GP1 is now PSR_GP4, etc.
5) Cleaned up the comments and code formatting		 jshamlet 1748d 16h /open8_urisc/trunk/VHDL/Open8_pkg.vhd
183 Renamed core to o8_cpu to match new naming scheme jshamlet 1750d 16h /open8_urisc/trunk/VHDL/Open8_pkg.vhd
182 Simplified the address generation logic at the expense of making LDX take one additional clock cycle. This allowed the address logic to be split out of the main state machine and simplified (greatly). During this process, a bug in SDO was found and fixed that caused it to return through the wrong pipe fill state wnen auto increment was disabled. jshamlet 1750d 16h /open8_urisc/trunk/VHDL/Open8_pkg.vhd
181 Altered the RSP instruction to allow the stack pointed to either be restored from registers or stored to registers based on the status of a processor bit. Also modified LDX to simplify the address logic. jshamlet 1751d 13h /open8_urisc/trunk/VHDL/Open8_pkg.vhd
172 General code cleanup jshamlet 3275d 14h /open8_urisc/trunk/VHDL/Open8_pkg.vhd
169 Corrected issue with CMP and SBC generating an inverted carry flag and added new constants to the package file to simplify interfacing new modules. jshamlet 3330d 15h /open8_urisc/trunk/VHDL/Open8_pkg.vhd
153 Fixed bug in interrupt logic that caused stack pointer to increment if interrupt occurred as specific instructions were being decoded,
Fixed bug in interrupt logic where instruction caching would remain enabled during an interrupt, causing improper execution depending on what instruction was in the decode stage as the interrupt is trigered.		 jshamlet 4933d 06h /open8_urisc/trunk/VHDL/Open8_pkg.vhd
151 Fixed STO instruction and interrupt logic to avoid address bus corruption issues. jshamlet 4943d 09h /open8_urisc/trunk/VHDL/Open8_pkg.vhd
10 corrected implementation for BTT to match V8/ARClite definition, changed sense of reset, corrected comments to match source values khays 5084d 18h /open8_urisc/trunk/VHDL/Open8_pkg.vhd
8 Need to learn SVN... jshamlet 5413d 05h /open8_urisc/trunk/VHDL/Open8_pkg.vhd
7 Initial Upload jshamlet 5413d 05h /open8_urisc/trunk/open8_urisc/VHDL/Open8_pkg.vhd

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