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[/] [open8_urisc/] [trunk/] [VHDL/] [o8_gpio.vhd] - Rev 223

Rev	Log message	Author	Age	Path
223	Added an OPEN8_BUS_TYPE record to simplify connection to Open8 modules. The CPU now passes and Open8_Bus out, which supplies the bus address, write enable, write data, and read enable. Read data and interrupts are still handled as separate signals, since they are muxed/connected at the next level up.	jshamlet	1716d 04h	/open8_urisc/trunk/VHDL/o8_gpio.vhd
213	Code and comment cleanup	jshamlet	1721d 05h	/open8_urisc/trunk/VHDL/o8_gpio.vhd
194	Cleaned up licensing sections	jshamlet	1731d 06h	/open8_urisc/trunk/VHDL/o8_gpio.vhd
191	Cleaned up comments, added back the OPEN8_NULLBUS constant, and added some new modules for ADCs and LCD displays. Also made the button input module more configurable by moving the debounce code to a separate entity and using generics to instantiate it.	jshamlet	1731d 07h	/open8_urisc/trunk/VHDL/o8_gpio.vhd
167	Updated CPU model; Pipelined ALU control signals to improve fMAX, corrected issue with interrupt controller priority not being obeyed, fixed bug in auto-indexing instructions where the upper register wasn't being properly incremented, cleaned up code to make the processor model easier to follow. Added several useful modules that use the Open8 bus.	jshamlet	4118d 00h	/open8_urisc/trunk/VHDL/o8_gpio.vhd