URL https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk

Subversion Repositories open8_urisc

[/] [open8_urisc/] [trunk/] [VHDL/] [o8_sys_timer.vhd] - Rev 197

Rev	Log message	Author	Age	Path
194	Cleaned up licensing sections	jshamlet	1707d 00h	/open8_urisc/trunk/VHDL/o8_sys_timer.vhd
191	Cleaned up comments, added back the OPEN8_NULLBUS constant, and added some new modules for ADCs and LCD displays. Also made the button input module more configurable by moving the debounce code to a separate entity and using generics to instantiate it.	jshamlet	1707d 01h	/open8_urisc/trunk/VHDL/o8_sys_timer.vhd
189	Merged changes from private repository, added ceil_log2 function to Open8_pkg, since it is used to calculate RAM vectors, cleaned up comments and removed local copies of the ceil_log2 function from peripherals.	jshamlet	1719d 23h	/open8_urisc/trunk/VHDL/o8_sys_timer.vhd
184	More file/entity renaming to match private versions.	jshamlet	1727d 01h	/open8_urisc/trunk/VHDL/o8_sys_timer.vhd
180	Added additional Open8 compatible modules	jshamlet	1732d 01h	/open8_urisc/trunk/VHDL/o8_pit.vhd
167	Updated CPU model; Pipelined ALU control signals to improve fMAX, corrected issue with interrupt controller priority not being obeyed, fixed bug in auto-indexing instructions where the upper register wasn't being properly incremented, cleaned up code to make the processor model easier to follow. Added several useful modules that use the Open8 bus.	jshamlet	4093d 18h	/open8_urisc/trunk/VHDL/o8_pit.vhd