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Subversion Repositories open8_urisc

[/] [open8_urisc/] [trunk/] [VHDL/] [sdlc_dp512b_ram.vhd] - Rev 207

Rev	Log message	Author	Age	Path
200	Renamed dual-port buffer to match other entities.	jshamlet	1729d 18h	/open8_urisc/trunk/VHDL/sdlc_dp512b_ram.vhd
195	Added dual-port RAM core for SDLC interface.	jshamlet	1730d 21h	/open8_urisc/trunk/VHDL/ram_dp512b_core.vhd