URL https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk

Subversion Repositories open8_urisc

[/] [open8_urisc/] [trunk/] [VHDL/] [vector_tx.vhd] - Rev 302

Rev	Log message	Author	Age	Path
296	Removed parallel interface from o8_vector_rx.vhd, modified vector_tx.vhd to use a generic for it's seed value, slight formatting change on o8_elapsed_usec.vhd.	jshamlet	1182d 14h	/open8_urisc/trunk/VHDL/vector_tx.vhd
285	Added checksum byte to vector tx/rx to avoid issues with serial line noise glitching the receiver. Also modified the transmitted to take any generic argument, rather than canned arguments.	jshamlet	1344d 22h	/open8_urisc/trunk/VHDL/vector_tx.vhd
268	Added a 16-input external interrupt manager and dedicated SPI tx-only transmitter (for use with DACs, etc.). Also updated the soft-DACs with cleaned up HDL.	jshamlet	1513d 10h	/open8_urisc/trunk/VHDL/vector_tx.vhd
240	Simplified the vector tx/rx system to a single line. An idle detector replaces the attn_req signal.	jshamlet	1680d 20h	/open8_urisc/trunk/VHDL/vector_tx.vhd